Architecture-Aware Synthesis of Fused Linear Algebra Kernels

• Shlok Shah

  Author

High-performance code generation from high-level array-oriented prototypes remains challenging due to the tight coupling between memory hierarchy behavior, loop organization, and platform compilers in modern architectures. This paper presents a compiler autotuner pipeline that lowers numerical kernels from a high-level prototype to C, applies loop restructuring for parallelism and locality, and then performs empirical search over transformations such as fusion, unroll-and-jam, vectorization, and alignment to select architecture-optimal variants. Central to the approach is composing multiple dense operations into a single fused kernel to minimize data movement and improve cache residency compared to sequential library calls. An annotation-driven tuning workflow systematically explores implementation choices and search heuristics to realize portable performance across target systems without manual rewrite cycles. Evaluations on representative kernels (e.g., VADD, ATAX, GEMVER, GESUMMV, BiCG) show consistent speedups over baseline C and vendor-tuned libraries, while also highlighting cases where library baselines remain competitive, motivating hybrid generation strategies. The results highlight a systems-centric co-design of compiler analysis and empirical tuning. The abstract should clearly state the research problem, objectives, theoretical grounding, methodology, key findings, and principal managerial implications. Emphasis should be placed on the relevance of the study to adaptive management practices and business intelligence–driven decision-making. Avoid citations, undefined acronyms, and excessive technical detail.

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